G80:GT215 clocks

Todo

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Introduction

G80:GT215 cards have the following clocks:

  • crystal clock: input from a quartz crystal, user as the base for other clocks
  • PCIE reference clock [HREF]: input from the PCIE bus, used as the base for other clocks
  • root clocks [RPLL1, RPLL2]: used as the base for other clocks
  • host clock [HCLK]: clocks the host interface parts, like PFIFO
  • timer clock [TCLK]: clocks the PTIMER circuitry, only present on G84+
  • NVIO clock [IOCLK]: used for communication with the NVIO chip, G80 and G200 only
  • memory clock [MCLK]: used to clock the VRAM, not present on IGPs
  • unknown clock 4010: present on G80, G92, G200 only
  • unknown clock 4018: present on G80, G200 only
  • unknown clock 4088: present on G200 only
  • core clock [NVCLK]: clocks most of the card’s logic
  • shader clock [SCLK]: clocks the CUDA multiprocessor / shader units
  • xtensa clock [XTCLK]: clocks the xtensa cores used for video decoding, only present on G84:G98 and G200
  • vdec clock [VDCLK]: clocks the remaining parts of video decoding engines, only present on G84+
  • video clocks [VCLK1,VCLK2]: used to drive the video outputs

Todo

figure out IOCLK, ZPLL, DOM6

Todo

figure out 4010, 4018, 4088

The root clocks are set up in PNVIO area, VPLLs are set up in PDISPLAY area, and the other clocks are set up in PCLOCK area.

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MMIO registers

8-bit space g80-pclock [0x1000]
g80-mmio 0x4000: PCLOCK [G80:GT215]

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8-bit space g80-pioclock [0x800]
g80-mmio 0xe800: PIOCLOCK [G80:GT215]

Todo

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8-bit space g80-pcontrol [0x1000]
g80-mmio 0xc000: PCONTROL [G80:GT215]

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HCLK: host clock

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NVCLK: core clock

Todo

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TCLK: timer clock

Todo

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