PRAMDAC: display output engine¶
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Introduction¶
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MMIO registers¶
-
8-bit space
pramdac
[0x1000]
¶ -
nv3-mmio
0x680000: PRAMDAC
[NV3:NV11,NV20:NV25] -
nv3-mmio
0x680000+i*0x2000: PRAMDAC[i] (i<2)
[NV11:NV20,NV25:G80] Todo
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Address Name Description 0x500 NVPLL Core PLL 0x504 MPLL Memory PLL 0x508 VPLL Video PLL
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8-bit space
prmdio
[0x1000]
¶ -
nv3-mmio
0x681000: PRMDIO
[NV3:NV11,NV20:NV25] -
nv3-mmio
0x681000+i*0x2000: PRMDIO[i] (i<2)
[NV11:NV20,NV25:G80] Todo
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The bit layout for all NV4 PLLs is that bits 18-16 are P, bits 15-8 are N, and bits 7-0 are M.
The clocks are calculated as such: (Crystal frequency * N) / (1 << P) / M.