NV1 XY logic

Introduction

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Vertex RAM

reg32 nv1-pgraph-vtx-xy-abs
nv1-pgraph 0x400+i*0x4: VTX_X_ABS[i] (i<18)
nv1-pgraph 0x480+i*0x4: VTX_Y_ABS[i] (i<18)

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reg32 nv1-pgraph-vtx-xy-rel
nv1-pgraph 0x500+i*0x4: VTX_X_REL[i] (i<18)
nv1-pgraph 0x580+i*0x4: VTX_Y_REL[i] (i<18)

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reg32 nv1-pgraph-vtx-beta
nv1-pgraph 0x700+i*0x4: VTX_BETA[i] (i<14)

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Clip rectangles

reg32 nv1-pgraph-canvas-min
nv1-pgraph 0x688: CANVAS_MIN

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reg32 nv1-pgraph-canvas-max
nv1-pgraph 0x68c: CANVAS_MAX

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reg32 nv1-pgraph-uclip-abs
nv1-pgraph 0x460+i*0x4: UCLIP_X_ABS[i] (i<2)
nv1-pgraph 0x468+i*0x4: UCLIP_Y_ABS[i] (i<2)

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reg32 nv1-pgraph-uclip-rel
nv1-pgraph 0x560+i*0x4: UCLIP_X_REL[i] (i<2)
nv1-pgraph 0x568+i*0x4: UCLIP_Y_REL[i] (i<2)

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reg32 nv1-pgraph-iclip-abs
nv1-pgraph 0x450: ICLIP_X_ABS
nv1-pgraph 0x454: ICLIP_Y_ABS

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reg32 nv1-pgraph-iclip-rel
nv1-pgraph 0x550: ICLIP_X_REL
nv1-pgraph 0x554: ICLIP_Y_REL

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Misc registers

reg32 nv1-pgraph-xy-a
nv1-pgraph 0x640: XY_A

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reg32 nv1-pgraph-xy-b
nv1-pgraph 0x644: XY_B

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reg32 nv1-pgraph-xy-d
nv1-pgraph 0x648: XY_D_X
nv1-pgraph 0x64c: XY_D_Y

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reg32 nv1-pgraph-xy-e
nv1-pgraph 0x65c: XY_E

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Source color

reg32 nv1-pgraph-src-color
nv1-pgraph 0x654: SRC_COLOR

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Valid state mask

reg32 nv1-pgraph-valid
nv1-pgraph 0x650: VALID

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Textured quad subdivision

reg32 nv1-pgraph-subdivide
nv1-pgraph 0x658: SUBDIVIDE

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