PRMA: Real mode BAR access

Introduction

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The MMIO registers

8-bit space prma [0x1000]
nv3-mmio 0x7000: PRMA
g80-mmio 0x7000: PRMA
gf100-mmio 0x7000: PRMA
Address Variants Name Description
0x80 G80: CTRL RMA enable & register selection
0x84 G80: SCRATCH scratch register
0x100 all SIG signature
0x104 all ADDR BAR address
0x10c all DATA_PARTIAL BAR partial data for 8/16-bit accesses
0x114 NV3:NV4 DATA_PARTIAL_INC BAR partial data for 8/16-bit accesses
8-bit space nv3-rma [0x100]

On NV3:NV4, this space is accessible through PCI BAR #2.

Address Variants Name Description
0x0 all SIG signature
0x4 all ADDR BAR address
0x8 all DATA BAR data
0xc all DATA_PARTIAL BAR partial data for 8/16-bit accesses
0x10 NV3:NV4 DATA_INC BAR data
0x14 NV3:NV4 DATA_PARTIAL_INC BAR partial data for 8/16-bit accesses
reg32 prma-sig
prma 0x100: SIG
nv3-rma 0x0: SIG

Read-only register, always reads as 0x2b16d065. Can be used as a signature, to verify the RMA space is visible.

reg32 prma-addr
prma 0x104: ADDR
nv3-rma 0x4: ADDR

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reg32 prma-data
nv3-rma 0x8: DATA
nv3-rma 0x10: DATA_INC [NV3:NV4]

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reg32 prma-data-partial
prma 0x10c: DATA_PARTIAL
prma 0x114: DATA_PARTIAL_INC [NV3:NV4]
nv3-rma 0xc: DATA_PARTIAL
nv3-rma 0x14: DATA_PARTIAL_INC [NV3:NV4]

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reg32 prma-ctrl
prma 0x80: CTRL [G80:]

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reg32 prma-scratch
prma 0x84: SCRATCH [G80:]

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